Semiconductor processing chambers are used for etching processes or the deposition of various materials inside a vacuum environment. These chambers have means for generating plasma to create energetic ions and a reactive chemistry that are used to perform the etching or deposition functions. These substances, however, are typically quite corrosive to the semiconductor chamber components surrounding the work pieces, and the corrosion can cause the generation of particles within the chamber that contaminate the semiconductor processing system and interfere with the precision processing steps.
Coatings have been developed to provide plasma resistance for components used in semiconductor processing chambers. The focus of these coatings, however, has been on compositional selection alone to try to reduce the problem of plasma erosion caused by the presence of activated fluorine or chlorine gases within the processing chamber. Most of the earlier coatings used in semiconductor process chambers were defined to solve one or two problems only; namely, corrosion of surfaces exposed to plasma and/or high particle generation.
Thermal spraying technology is a known means for depositing high melting point materials on low melting point substrates. For example, metal oxides, such as Al2O3, Cr2O3, TiO2, ZrO2, MgO2, Y2O3, Gd2O3 and mixtures of various oxides have been be deposited on aluminum, steel or various alloy substrates to provide wear resistance and/or corrosion resistance using thermal spray deposition mechanisms (Ref. ASM Handbook, Vol. 5, Surface Engineering, Thermal Spray Coatings).
Yttrium oxide (yttria) is known as a single oxide material that resists fluorine plasma erosion. Yttria coatings have been produced by various methods such as thermal spray, chemical vapor deposition (CVD), physical vapor deposition (PVD), aerosol deposition (AD) and sol gel methods. Various metal oxide coatings, such as Y2O3, and lanthanide series rare earth oxides, such as Ce2O3, Sm2O3, Gd2O3, Yb2O3 and mixtures thereof, have been described for use in connection with semiconductor process chamber components to prevent plasma erosion of these components when exposed to halogen chemistries.
For example, U.S. Pat. No. 4,419,201 describes the use of a thermal sprayed Al2O3 coating on the surfaces of a reaction chamber to prevent chlorine gas plasma corrosion. U.S. Pat. No. 5,637,237 describes use of Al2O3, Y2O3 or Sc2O3 coatings on a heated chamber wall liner to reduce erosion of the walls when exposed to oxide etching gases, such as C2F4 and C2F6. U.S. Pat. No. 6,776,873 describes a high purity Y2O3 coating provided on anodized aluminum, where the Y2O3 may contain 10 wt % of Al2O3 to improve corrosion resistance against plasma containing fluorine and oxygen. U.S. Pat. No. 7,364,798 describes an internal member of a plasma etching chamber that is provided with a top coat of Y2O3 on top of Al2O3. U.S. Pat. No. 7,494,723 further describes an Y2O3 coating, where the top layer is densified by an electron beam process, and the coating (densified skin) may have an undercoat of Al2O3 or Al2O3 and Y2O3. It should be noted, however, that once the densified skin coating is eroded or the top layer is cracked, the undercoating layers can be suddenly exposed, which would result in a sudden increase in plasma erosion and generation of a very high number of particles, which, in turn, would result in poor yield of the product being manufactured.
U.S. Patent Application Publication No. 2010/0272982 A1 describes yttria stabilized zirconia coatings that provide plasma erosion resistance when exposed to CF4/O2. U.S. Patent Application Publication No. 2012/0177908 A1 further discloses the use of graded porosity in Y2O3 and Zr2O3 coatings for providing thermal strain resistance and plasma erosion resistance. U.S. Patent Application Publication No. 2012/0196139 A1 describes a composite coating with an undercoat of two ceramics for corrosion protection and a metal oxide top coat for plasma erosion protection.
However, prior to the present invention, no efforts have been made to control the thermal emissivity characteristics of the coatings or to evaluate the effects with respect to the uniformity of plasma etching performance or the improvement of plasma erosion resistance. Indeed, none of the prior art relates to controlling the emissivity of the coatings so as to increase the efficiency of thermal energy reflectance from chamber walls, and the prior art fails to recognize any beneficial significance whatsoever attributable to controlling the emissivity of the coatings. Moreover, none of the prior art addresses the need to or provide any means for controlling surface morphology to further improve particle reduction inside the processing chamber. In addition, further solutions are needed to reduce the interface corrosion and dielectric breakdown that are experienced by many semiconductor processing chamber components.